On the Design of Low-power Signal Conditioners for Resistive Sensors

 This work analyzes power consumption in signal conditioning circuits for resistive sensors. We show that, for a given dynamic range for the measurand, simple conditioners based on voltage dividers or Wheatstone bridges directly connected to an analog-to-digital converter (ADC) do not usually have minimal power consumption. We develop analytical guidelines to achieve the optimal power design for signal conditioners and apply them to the actual design of the conditioner for an RTD sensor. We show that by adding a low-power amplifier plus a passive low-pass filter to a voltage divider sensor interface, the power consumption can be significantly reduced as compared to that of standard voltage dividers designed for maximal sensitivity.